The digital computing world is built on a structure of Boolean logic applied to binary values (“yes” or “no”, one or zero, in or out), i.e. on two steady states (or signal ratings): symbolic zero, when a signal is absent and symbolic one, when a signal is present. Digital adders are typically based on binary logic. It is also known that some analog inversion adders form the algebraic sum of two and more input voltages, changing its polarity to opposite sign and they work based on the summation of signals using resistors at the inversion entrance of operational amplifier to obtain at the output of device a summarized resulted signal, taking into account phase and amplitude.
But this powerful structure is a gross oversimplification of the real world, where many shades of gray exist between black and white. In everyday life, we use quasimetric notions that are clearly related to numerical concepts or values but lack precision or demarcation. The real world simply does not map well to binary distinctions, and numerical precision is often unhelpful in making qualitative statements.
One approach proposed to resolve those situations, which could not be decided on the base of binary logic, is so-called fuzzy logic. The fuzzy logic approach to control problems mimics how a person would make decisions. In fuzzy systems, values are indicated by a number (called a truth value) in the range from 0 to 1, where 0.0 represents absolute falseness and 1.0 represents absolute truth. While this range evokes the idea of probability, fuzzy logic and fuzzy sets operate quite differently from probability.
Digital signal processing circuits are being implemented as large-scale-integrated (LSI) circuits on chips. Since the binary signals may assume only two states, the amount of information on the signal line interconnections carrying these signals is limited on the chips. If the circuits must process higher amounts of information, the number of metal line interconnections should be increase. However, the number of transistors and resistors, together with the number of metal signal line interconnections, that can be integrated on a chip of given size is limited by the conventional photomasking and silicon surface processing technology.
As an alternative to binary logic, multivalued logic is being considered for use on integrated circuits. The term “multivalued” is used herein to mean signals that may assume more than two states, i.e., three or more. For example, a quaternary or 4-valued logic circuit is a circuit that processes a signal that may assume any one of four states. A signal that may assume four states thus contains twice the amount of information of a binary signal which can assume only two states. Also artificial Intelligence (AI) would benefit from use of Aristotle's ternary logic, 3-valued (yes, don't know, no), or 5-value logic (exactly “yes”, about “yes”, don't know, about “no”, exactly “no”) which are often used by human beings instead of the simple binary logic (“yes”, “no”). Multivalued logic circuits could be implemented with fewer interconnections than binary logic circuits, since each signal line can carry more information than binary logic circuits. Thus, with multivalued logic, the same number of signal lines used on a chip would provide higher signal processing capability than for a binary logic. Also Artificial Intelligence (AI) would benefit from use of multi-valued logic, such as the ternary logic, 3-valued (yes, don't know, no), or 5-value logic (exactly “yes”, about “yes”, don't know, about “no”, exactly “no”) which are often used by human beings instead of the simple binary logic (“yes”, “no”).
However, successful computer implementation of multivalued logic, such as the ternary logic or 5-value logic has not been achieved yet due to the absence of effective, universal semiconductor elements with multiple (three or more) steady states.
Russian patent 2 176 850 disclose a low-noise wideband current amplifier with four current mirrors connected in series between positive and negative power supply lines. The outputs of the first current mirror is connected to the positive power supply line, and the outputs of the second current mirror, which is complementary to the first one, are connected to the negative power supply line. Each a pair of transistor whose control electrodes are connected to each other and to a voltage reference diode and whose other electrodes form two input and two output electrodes of the current mirror. In addition to the current mirrors, first and second complementary pairs of output transistors are also connected between the power supply such the common connection point of the series connected complementary output transistors in the first and second pair provide the first and the second output, respectively, of the amplifier. Between the first and the second current mirrors there are in series inserted the third and fourth current mirrors which are configured to be complementary to the first and second current mirrors, correspondingly. The first inputs of the third and fourth current mirrors are interconnected to form a first input of the amplifier, and the second inputs of the third and fourth current mirrors are interconnected to form a second input of the amplifier. The first and second outputs of the third current mirror is connected to the respective inputs of the first current mirror and to the control electrodes of first output transistors in the first and second complementary pairs, and the outputs of the fourth current mirror is connected to the respective inputs of the second current mirror and to the control electrodes of second complementary output transistors in the first and second complementary pairs. The resulting amplifier circuit can have three steady states at every output thereof (+V, 0, −V).